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An Ultrahigh-Voltage SiC Superjunction MOSFET with Split Dummy Gate for Improving Switching and Short-Circuit Capability

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Abstract

A 10 kV-class SiC superjunction (SJ) metal–oxide–semiconductor field-effect transistor (MOSFET) with a split dummy gate (SDG-SJ) is proposed and investigated by technology computer-aided design (TCAD) simulation. To mitigate the compromise issue between the specific on-resistance (Ron, sp) and breakdown voltage (BV) in the conventional SiC MOSFET (Con-MOS), the SJ structure is introduced in the ultrahigh-voltage (UHV) MOSFET. Compared to the Con-MOS, the static figure of merit (FOM) (BV2/Ron, sp) of the SDG-SJ is improved by a factor of 5.6, which can be attributed to the increased drift region doping concentration and effective electric field modulation. Moreover, the split dummy gate structure is utilized in the proposed device to further improve the dynamic characteristics. The results show that the SDG-SJ exhibits lower reverse transfer capacitance and saturation current, which contributes to enhanced switching and short-circuit capability. The dynamic FOM (Ron, sp × QGD) of the SDG-SJ is reduced by about 98% compared to the conventional SiC SJ MOSFET (Con-SJ). These exceptional static and dynamic characteristics demonstrate the great potential of the proposed SDG-SJ for UHV applications. Moreover, no supplemental process is required for the fabrication of the proposed device compared to the Con-SJ.

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The authors declare that the data supporting the findings of this study are available within the article.

References

  1. X. She, A.Q. Huang, Ó. Lucía, and B. Ozpineci, Review of silicon carbide power devices and their applications. IEEE Trans. Ind. Electron. 64, 8193 (2017).

    Google Scholar

  2. Q. Xun, B. Xun, Z. Li, P. Wang, and Z. Cai, Application of SiC power electronic devices in secondary power source for aircraft. Renew. Sust. Energ. Rev. 70, 1336 (2017).

    CAS Google Scholar

  3. T. Matsunaga, K. Hirata, S. Singh, M. Matsunami, and T. Takeuchi, A field effect heat flow switching device. Mater. Trans. 62, 16 (2021).

    CAS Google Scholar

  4. K. Hirata, T. Matsunaga, S. Singh, M. Matsunami, and T. Takeuchi, Capacitor-type thin-film heat flow switching device. Jpn. J. Appl. Phys. 60, 124004 (2021).

    CAS Google Scholar

  5. J. Wang, T. Zhao, J. Li, A.Q. Huang, R. Callanan, F. Husna, and A. Agarwal, Characterization, modeling, and application of 10-kV SiC MOSFET. IEEE Trans. Electron. Dev. 55, 1798 (2008).

    CAS Google Scholar

  6. R. Kosugi, S. Ji, K. Mochizuki, K. Adachi, S. Segawa, Y. Kawada, Y. Yonezawa, H. Okumura, in 2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) (2019), pp. 39.

  7. W. Zhang, Y. Liu, H. Li, T. Liu, M. Qiao, Z. Li, and B. Zhang, The minimum specific on-resistance of 4H-SiC superjunction devices. IEEE Trans. Electron. Dev. 71, 6216 (2024).

    CAS Google Scholar

  8. S. Liu, M. Huang, M. Wang, M. Zhang, and J. Wei, Considerations for SiC super junction MOSFET: on-resistance, gate structure, and oxide shield. Microelectron. J. 137, 105823 (2023).

    CAS Google Scholar

  9. P. Shen, Y. Wang, and F. Cao, A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance. Chin. Phys. B 31, 078501 (2022).

    CAS Google Scholar

  10. W. Cao, S. Yin, X. Hu, M. Li, X. Ge, and D. Liu, A novel SiC superjunction MOSFET with three-level buffer and unipolar channel diode. Micro Nanostruct. 172, 207420 (2022).

    CAS Google Scholar

  11. X. Hu, Y. Ou, R. Mai, M. Li, Y. Xu, and D. Liu, 1.2 kV 4H-SiC super junction UMOSFET with a low-k dielectric pillar. Micro Nanostruct. 176, 207526 (2023).

    CAS Google Scholar

  12. S. Xu, C. Ren, Y.C. Liang, P.-D. Foo, and J.K.O. Sin, Theoretical analysis and experimental characterization of the dummy-gated VDMOSFET. IEEE Trans. Electron. Dev. 48, 2168 (2001).

    Google Scholar

  13. P. Vudumula, and S. Kotamraju, Design and optimization of 1.2-kV SiC planar inversion MOSFET using split dummy gate concept for high-frequency applications. IEEE Trans. Electron. Dev. 66, 5266 (2019).

    CAS Google Scholar

  14. X. Deng, S. Gao, B. Tan, J. Li, X. Li, C. Li, W. Chen, Z. Li, and B. Zhang, Multizone gradient-modulated guard ring technique for ultrahigh voltage 4H-SiC devices with increased tolerances to implantation dose and surface charges. IEEE J. Emerg. Sel. Top. Power Electron. 7, 1505 (2019).

    Google Scholar

  15. Silvaco International, ATLAS User’s Manual, Device Simulation Software, Santa Clara, CA, (2018). https://silvaco.com.

  16. P. Vudumula, and S. Kotamraju, Design and optimization of SiC super-junction MOSFET using vertical variation doping profile. IEEE Trans. Electron. Dev. 66, 1402 (2019).

    CAS Google Scholar

  17. L. Geng, R. Yue, and Y. Wang, Expanding the dose window of step-etched space-modulated JTE for ultrahigh voltage 4H-SiC devices. Microelectron. J. 152, 106387 (2024).

    Google Scholar

  18. T. Yang, Y. Wang, and R. Yue, SiC trench MOSFET with reduced switching loss and increased short-circuit capability. IEEE Trans. Electron. Dev. 67, 3685 (2020).

    CAS Google Scholar

  19. H. Kapels, in 2009 13th European Conference on Power Electronics and Applications (2009), pp. 1.

  20. Y. Kobayashi, S. Kyogoku, T. Morimoto, T. Kumazawa, Y. Yamashiro, M. Takei, and S. Harada, in 2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) (2019), pp. 31.

  21. M. Okada, S. Kyogoku, T. Kumazawa, J. Saito, T. Morimoto, M. Takei, and S. Harada, in 2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD) (2020), pp. 70.

  22. M. Alam, D.T. Morisette, and J.A. Cooper, Design guidelines for superjunction devices in the presence of charge imbalance. IEEE Trans. Electron. Dev. 65, 3345 (2018).

    CAS Google Scholar

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Funding

This work was supported by the National Key Research and Development Program of China (Grant No.2023YFB3609500).

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Authors and Affiliations

  1. School of Integrated Circuits, Tsinghua University, Beijing, 100084, China

    Lixin Geng, Ruifeng Yue & Yan Wang

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Correspondence to Lixin Geng.

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Geng, L., Yue, R. & Wang, Y. An Ultrahigh-Voltage SiC Superjunction MOSFET with Split Dummy Gate for Improving Switching and Short-Circuit Capability. J. Electron. Mater. (2025). https://doi.org/10.1007/s11664-025-12170-5

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  • DOI   https://doi.org/10.1007/s11664-025-12170-5

Keywords

  • 4H-SiC superjunction (SJ) MOSFET
  • ultrahigh-voltage (UHV)
  • specific on-resistance (R on, sp)
  • switching characteristic
  • short-circuit capability

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